An Error Correction Method for Binary and Multiple-Valued Logic

2011 41st IEEE International Symposium on Multiple-Valued Logic Pub Date : 2011-05-23 DOI:10.1109/ISMVL.2011.52

C. Winstead, Yi Luo, E. Monzon, Abiezer Tejeda

引用次数: 19

Abstract

This paper presents a method and circuit for correcting faults in logic systems. The method, called "restorative feedback" (RFB), is similar in some respects to triple modular redundancy (TMR), but has an improved error probability with respect to transient errors. Simulation results indicate an improvement by about two orders of magnitude compared to traditional TMR. CMOS circuits are presented for implementing restorative feedback. For binary logic, a dynamic CMOS circuit is considered. For multiple-valued logic, a semi-floating gate implementation is presented.

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二值和多值逻辑的误差校正方法

提出了一种逻辑系统纠错的方法和电路。这种方法被称为“恢复性反馈”(RFB)，在某些方面类似于三模冗余(TMR)，但相对于瞬态错误有一个改进的错误概率。仿真结果表明，与传统的TMR相比，该方法提高了约两个数量级。提出了用于实现恢复性反馈的CMOS电路。对于二进制逻辑，考虑了动态CMOS电路。对于多值逻辑，提出了一种半浮门实现。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2011 41st IEEE International Symposium on Multiple-Valued Logic

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