High Performance and Area Efficient Ferroelectric FET based Reconfigurable Logic Circuit

Abstract

The emerging nonvolatile memory (NVM)-based logic in-memory (LiM) structure can reduce power consumption caused by data transfer since it integrates memory and logic units very closely. The ferroelectric field-effect transistor (FeFET) is one of the promising candidates for NVM-based LiM structure owing to its unique characteristics: three-terminal structure and high ION/OFF ratio. In this paper, we propose the FeFET based reconfigurable logic circuit which can provide AND/OR/XOR logic value in a single circuit. Simulation results show that it can achieve a 67% lower transistor number, 17% faster delay, and 54% less energy than STT-MTJ based reconfigurable logic circuit.