A 0.5V CMOS LNA for 2.4-GHz WSN application

Abstract

This study was initiated to design a low noise amplifier (LNA), which could work with ultra low voltage of 0.5V and was optimized for WSN application using SMIC 0.13μm RF-CMOS technology. The topology of differential inductance degenerated folded cascode based on power-constrained simultaneous noise and input matching (PCSNIM) technique was adopted. Chosen circuit demonstrated a power gain of 16.5dB, consuming 3.3mW DC power, showing 0.78dB NF and an input 1-dB compression point of −20.9dBm. Both input match (S11) and output match (S22) were below −19dB. The results indicate that this LNA is fully applicable to the low voltage and low power application.