Monte Carlo analysis of III–V PIN diodes for tunnel-FETs and Impact Ionization-MOSFETs

Abstract

III–V Impact-ionization (II) metal-oxide-semiconductor FETs (I-MOSFETs) and tunnel FETs (TFETs) are being explored as promising devices to achieve the best behavior for low power logical circuits. To facilitate the design process of these devices from the physical point of view, a Monte Carlo (MC) model which includes impact ionization events and band-to-band tunneling is presented. Our MC simulator can reproduce the I–V characteristics of experimental ungated In0.53Ga0.47As 100 nm PIN diodes. The tunneling emerges for lower applied voltages than impact ionization events, so that they are found to be appropriate for TFET structures.