{"title":"Chemical Mechanical Polishing of Semiconductor Wafers: Surface Element Modeling and Simulation To Predict Wafer Surface Shape","authors":"Qi Zhang, Zhen Li, H. Qi, Zhichao Li","doi":"10.1109/CSTIC52283.2021.9461553","DOIUrl":null,"url":null,"abstract":"Chemical mechanical planarization (CMP) is widely used to planarize semiconductor wafers and smooth the wafer surface to obtain wafers with required flatness and surface quality. Wafer flatness has a great effect on the photolithographic system's ability to print integrated circuit features. In this paper, a surface element method is used to develop a mathematic model to predict the wafer flatness, which are parameterized and quantified by total thickness variation (TTV) and Bow. Results show that the model effectively simulates the CMP process and predicts the wafer flatness.","PeriodicalId":186529,"journal":{"name":"2021 China Semiconductor Technology International Conference (CSTIC)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 China Semiconductor Technology International Conference (CSTIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSTIC52283.2021.9461553","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Chemical mechanical planarization (CMP) is widely used to planarize semiconductor wafers and smooth the wafer surface to obtain wafers with required flatness and surface quality. Wafer flatness has a great effect on the photolithographic system's ability to print integrated circuit features. In this paper, a surface element method is used to develop a mathematic model to predict the wafer flatness, which are parameterized and quantified by total thickness variation (TTV) and Bow. Results show that the model effectively simulates the CMP process and predicts the wafer flatness.