A Low Power CMOS Operational Transconductance Amplifier with Improved CMRR

Nedson J. Maia, A. D. R. Sánchez, R. Moreno, T. Pimenta, L. H. C. Ferreira
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引用次数: 1

Abstract

This work proposes a new low power Operational Transconductance Amplifier (OTA) topology. The rejection to common-mode signals is achieved by adding parallel transistors to input MOS transistors in order to increase the Common Mode Rejection Ratio (CMRR). It achieves a gain of 87.34 dB at 9.65 μW power consumption. The article presents a comparison to other OTA topologies. The proposed OTA was designed for the IBM 0.13 μm CMOS technology.
改进CMRR的低功耗CMOS运算跨导放大器
本文提出了一种新的低功耗跨导运算放大器(OTA)拓扑结构。对共模信号的抑制通过在输入MOS晶体管上增加并联晶体管来实现,以提高共模抑制比(CMRR)。在9.65 μW的功耗下实现了87.34 dB的增益。本文提供了与其他OTA拓扑的比较。该OTA是基于IBM 0.13 μm CMOS技术设计的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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