Power Aware 10T Static Random-Access Memory Design

Mooni Rahul, V. Vaishnavi, Kasthuri Vyshnavi, Chandramauleshwar Roy
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引用次数: 0

Abstract

Our proposed 10T (PROP10T) SRAM cell is presented in this article. The important design metrics are assessed using HSPICE Monte Carlo Simulations. In our proposed 10T SRAM cell. The estimated results of PROP10T Static RAM cell are contrasted with the conventional 6T (CONV6T) and conventional 8T (CONV8T) Static RAM cell. Compared to the CONV6T and CONV8T, the PROP10T has demonstrated shorter read delay (TRA). The write delay (TWA) of PROP10T is now almost 4 times faster than CONV6and T's 1.2 times faster than CONV8 T's. On CONV6T and CONV8T, respectively, the proposed design improves RSNM (read static noise margin) by 3.1 and 2 dB [1].
功率感知10T静态随机存取存储器设计
本文介绍了我们提出的10T (PROP10T) SRAM单元。使用HSPICE蒙特卡洛模拟对重要的设计指标进行评估。在我们提出的10T SRAM单元中。将PROP10T静态RAM单元的估计结果与常规6T (CONV6T)和常规8T (CONV8T)静态RAM单元进行了对比。与CONV6T和CONV8T相比,PROP10T具有更短的读取延迟(TRA)。PROP10T的写延迟(TWA)现在几乎比conv6快4倍,比conv8t快1.2倍。在CONV6T和CONV8T上,提出的设计分别将RSNM(读静态噪声裕度)提高了3.1和2 dB[1]。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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