Architecture-Aware Mapping and Scheduling of IMA partitions on Multicore platforms

Abstract

Integrated Modular Avionics (IMA) architecture has emerged as the de-facto standard for hosting multiple avionic functions with different criticality levels on the same hardware platform. To further reduce size, weight, power and cost, the second generation IMA architecture aims to migrate multiple singlecore IMA partitions onto a multi-core hardware platform. In this paper, we propose a framework to safely allocate and schedule communicating, mixed-criticality IMA partitions on a cache-based multi-core platform with the added constraint that certain partition pairs should not be allocated on the same core for safety and security reasons. Simulation results demonstrate the effectiveness of our approach in allocating and scheduling partitions while respecting all constraints.