A Quad-Core 60 GHz Push-Push 45 nm SOI CMOS VCO with −101.7 dBc/Hz Phase Noise at 1 MHz offset, 19 % Continuous FTR and −187 dBc/Hz FoMT

J. Rimmelspacher, R. Weigel, A. Hagelauer, V. Issakov
{"title":"A Quad-Core 60 GHz Push-Push 45 nm SOI CMOS VCO with −101.7 dBc/Hz Phase Noise at 1 MHz offset, 19 % Continuous FTR and −187 dBc/Hz FoMT","authors":"J. Rimmelspacher, R. Weigel, A. Hagelauer, V. Issakov","doi":"10.1109/ESSCIRC.2018.8494241","DOIUrl":null,"url":null,"abstract":"This paper presents a 60 GHz Quad-Core push-push VCO in a 45 nm partially depleted (PD) Silicon-on-Insulator (SOI) CMOS technology. The measured phase noise (PN) at 60.5 GHz is −101.7 dB/Hz at 1 MHz offset from carrier. The continuous frequency-tuning range (FTR) is 19 %. The Quad-Core VCO consumes only 40 mW DC power. The complete circuit including fundamental and second harmonic (H2) output buffers draws 110 mA from a single 1 V supply. The VCO cores are coupled via resonant-tank transformers. A similar transformer-coupled Dual-Core VCO is fabricated and measured to prove the relative PN improvement between Dual-Core and Quad-Core topology. The total area of the Quad-Core VCO excluding pads is 0.1 mm2.","PeriodicalId":355210,"journal":{"name":"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2018.8494241","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10

Abstract

This paper presents a 60 GHz Quad-Core push-push VCO in a 45 nm partially depleted (PD) Silicon-on-Insulator (SOI) CMOS technology. The measured phase noise (PN) at 60.5 GHz is −101.7 dB/Hz at 1 MHz offset from carrier. The continuous frequency-tuning range (FTR) is 19 %. The Quad-Core VCO consumes only 40 mW DC power. The complete circuit including fundamental and second harmonic (H2) output buffers draws 110 mA from a single 1 V supply. The VCO cores are coupled via resonant-tank transformers. A similar transformer-coupled Dual-Core VCO is fabricated and measured to prove the relative PN improvement between Dual-Core and Quad-Core topology. The total area of the Quad-Core VCO excluding pads is 0.1 mm2.
四核60 GHz Push-Push 45 nm SOI CMOS压控振荡器,在1mhz偏移时相位噪声为−101.7 dBc/Hz,连续FTR为19%,fmt为−187 dBc/Hz
本文提出了一种采用45纳米部分耗尽(PD)绝缘体上硅(SOI) CMOS技术的60 GHz四核推推式压控振荡器。在距载波1mhz偏移处,60.5 GHz处测量到的相位噪声(PN)为−101.7 dB/Hz。连续频率调谐范围(FTR)为19%。四核VCO仅消耗40mw直流功率。完整的电路包括基波和二次谐波(H2)输出缓冲器,从单个1v电源提取110 mA。VCO芯通过谐振槽变压器耦合。制作了一个类似的变压器耦合双核VCO,并对其进行了测量,以证明双核和四核拓扑之间PN的相对改善。除焊盘外,四核VCO的总面积为0.1 mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信