High Speed Power Efficient CGIC Digital Filters For VLSI Applications

G. Paul, A. Pal
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引用次数: 3

Abstract

Digital filter structures based on current-conversion generalized immittance converter (CGIC) proposed by Antoniou and Rezk possess excellent sensitivity and stability characteristics. In this paper, the CGIC structures of low pass and high pass are analyzed to determine the clock period to be used with these structures for VLSI applications and are modified to reduce the clock period further to increase the speed keeping the sensitivity and stability of these structures are exactly the same as those of the original structures. The modified filters are also power efficient while maintaining the original speed but increase the latency to some extent. With a supply voltage of 5 volts the modified filters show 33% increase in speed and 68% reduction in dynamic power consumption if supply voltage is scaled down without increasing the original speed
用于VLSI应用的高速高效CGIC数字滤波器
Antoniou和Rezk提出的基于电流转换广义阻抗变换器(CGIC)的数字滤波器结构具有良好的灵敏度和稳定性。本文对低通和高通CGIC结构进行了分析,确定了用于VLSI应用的时钟周期,并对其进行了修改,以进一步减小时钟周期以提高速度,同时保持了与原始结构完全相同的灵敏度和稳定性。改进后的滤波器在保持原有速度的同时也很节能,但在一定程度上增加了延迟。当电源电压为5伏时,如果电源电压按比例降低而不增加原始速度,则改进后的滤波器显示速度增加33%,动态功耗降低68%
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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