Do-Hoon Kim, Yongseok Lim, Jin-Woong Cho, Chungyong Lee
{"title":"Design and implementation of MB-OFDM UWB modem","authors":"Do-Hoon Kim, Yongseok Lim, Jin-Woong Cho, Chungyong Lee","doi":"10.1109/ICCE.2011.5722660","DOIUrl":null,"url":null,"abstract":"A multi-band orthogonal frequency division multiplexing (MB-OFDM) ultra-wideband (UWB) modem design for high speed wireless communication is presented. The media access control (MAC)/ physical layer (PHY) part of the developed chip is based on the WiMedia standard. ARM9 is adopted for high speed data transaction and USB 2.0 and SDIO are supported for host interface. The modem part occupies about half of the whole chip area, and is developed by using most of standard cells. 90nm CMOS technology is used and the chip size is about 5mm × 5mm. The power management mode is implemented to reduce the average power consumption.","PeriodicalId":256368,"journal":{"name":"2011 IEEE International Conference on Consumer Electronics (ICCE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International Conference on Consumer Electronics (ICCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCE.2011.5722660","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A multi-band orthogonal frequency division multiplexing (MB-OFDM) ultra-wideband (UWB) modem design for high speed wireless communication is presented. The media access control (MAC)/ physical layer (PHY) part of the developed chip is based on the WiMedia standard. ARM9 is adopted for high speed data transaction and USB 2.0 and SDIO are supported for host interface. The modem part occupies about half of the whole chip area, and is developed by using most of standard cells. 90nm CMOS technology is used and the chip size is about 5mm × 5mm. The power management mode is implemented to reduce the average power consumption.