A. Malinowski, James Chen, S. Mishra, S. Samavedam, D. K. Sohn
{"title":"What is Killing Moore's Law? Challenges in Advanced FinFET Technology Integration","authors":"A. Malinowski, James Chen, S. Mishra, S. Samavedam, D. K. Sohn","doi":"10.23919/MIXDES.2019.8787084","DOIUrl":null,"url":null,"abstract":"First microprocessor released to the market in 1971 was consisting of 2300 transistors. Following Moore's law less than five decades later consumer electronic chips consist of billions of transistor reaching densities as much as 100 million transistors in square millimeter Several times in the past it was predicted that technological barriers would slow or even stop CMOS technology scaling trend. Despite these predictions, the monetary benefit of growth has been driving massive research and pathways have been Lays found around those barriers. In 2011 a 3-D tri-gate transistor structure, FinFET, has been introduced into CMOS mainstream manufacturing which was a pathway replacing running out of steam planar technology. However, similarly to the planar technology now FinFET scaling is running out of steam due to difficult technological barriers and integration challenges. In 2021 year last CMOS technology node based on FinFET might be released for production. Difficulties and technology integration challenges outlined in this paper may end 10-year era of FinFET technology.","PeriodicalId":309822,"journal":{"name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/MIXDES.2019.8787084","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
First microprocessor released to the market in 1971 was consisting of 2300 transistors. Following Moore's law less than five decades later consumer electronic chips consist of billions of transistor reaching densities as much as 100 million transistors in square millimeter Several times in the past it was predicted that technological barriers would slow or even stop CMOS technology scaling trend. Despite these predictions, the monetary benefit of growth has been driving massive research and pathways have been Lays found around those barriers. In 2011 a 3-D tri-gate transistor structure, FinFET, has been introduced into CMOS mainstream manufacturing which was a pathway replacing running out of steam planar technology. However, similarly to the planar technology now FinFET scaling is running out of steam due to difficult technological barriers and integration challenges. In 2021 year last CMOS technology node based on FinFET might be released for production. Difficulties and technology integration challenges outlined in this paper may end 10-year era of FinFET technology.