{"title":"Rethinking behavioral synthesis for a better integration within existing design flows","authors":"W. Cesário, A. Jerraya, Z. Sugar, I. Moussa","doi":"10.1109/ICCD.2000.878330","DOIUrl":null,"url":null,"abstract":"Although very popular and largely wanted, behavioral synthesis was never widely accepted by designers. This paper analyzes the reasons for this failure and introduces a new generation of behavioral synthesis tools with more practical synthesis schemes. The main breakthrough of this new generation is the redefinition of the behavioral synthesis flow to better profit from the power of modern RTL and FSM synthesis. The synthesis results for two large design examples: a 2-million transistors ATM shaper and a motion estimator for a video codec (H261 standard) are shown. They illustrate the effectiveness of this new approach when compared with RT-level design methodologies.","PeriodicalId":437697,"journal":{"name":"Proceedings 2000 International Conference on Computer Design","volume":"82 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 2000 International Conference on Computer Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.2000.878330","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Although very popular and largely wanted, behavioral synthesis was never widely accepted by designers. This paper analyzes the reasons for this failure and introduces a new generation of behavioral synthesis tools with more practical synthesis schemes. The main breakthrough of this new generation is the redefinition of the behavioral synthesis flow to better profit from the power of modern RTL and FSM synthesis. The synthesis results for two large design examples: a 2-million transistors ATM shaper and a motion estimator for a video codec (H261 standard) are shown. They illustrate the effectiveness of this new approach when compared with RT-level design methodologies.