{"title":"A Task Graph Approach for Efficient Exploitation of Reconfiguration in Dynamically Reconfigurable Systems","authors":"Kyprianos Papademetriou, A. Dollas","doi":"10.1109/FCCM.2006.19","DOIUrl":null,"url":null,"abstract":"Partial reconfiguration suffers from the inherent high latency and low throughput which is more considerable when reconfiguration is performed on-demand. This work deals with this overhead in processors combining a fixed processing unit (FPU), and a reconfigurable processing unit (RPU). Static and dynamic prefetching (Li, 2002), and instruction forecasting (Iliopoulos and Antonakopoulos, 2001) are targeting at reduction of the overhead through preloading of configurations. Banerjee et al. (2005) transform the task graph of an application and a heuristic algorithm evaluates the reduction in schedule length and selects the most promising configuration. Tasks are scheduled according to the physical resource constraints. In this work the prefetching model of Li (2002) was augmented by taking into account the hardware area constraints of a partially reconfigurable system. Given the task graph of an application, tasks with low probability to be executed are split and preloaded according to the hardware in order to be fully utilized. Thus, the time during which reconfiguration is overlapped with processor execution is increased","PeriodicalId":123057,"journal":{"name":"2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FCCM.2006.19","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Partial reconfiguration suffers from the inherent high latency and low throughput which is more considerable when reconfiguration is performed on-demand. This work deals with this overhead in processors combining a fixed processing unit (FPU), and a reconfigurable processing unit (RPU). Static and dynamic prefetching (Li, 2002), and instruction forecasting (Iliopoulos and Antonakopoulos, 2001) are targeting at reduction of the overhead through preloading of configurations. Banerjee et al. (2005) transform the task graph of an application and a heuristic algorithm evaluates the reduction in schedule length and selects the most promising configuration. Tasks are scheduled according to the physical resource constraints. In this work the prefetching model of Li (2002) was augmented by taking into account the hardware area constraints of a partially reconfigurable system. Given the task graph of an application, tasks with low probability to be executed are split and preloaded according to the hardware in order to be fully utilized. Thus, the time during which reconfiguration is overlapped with processor execution is increased
部分重新配置受到固有的高延迟和低吞吐量的影响,这在按需执行重新配置时更为严重。这项工作处理的是由固定处理单元(FPU)和可重构处理单元(RPU)组成的处理器的开销。静态和动态预取(Li, 2002)以及指令预测(Iliopoulos和Antonakopoulos, 2001)的目标是通过预加载配置来减少开销。Banerjee et al.(2005)对应用程序的任务图进行变换,并使用启发式算法评估调度长度的减少并选择最有希望的配置。根据物理资源约束来调度任务。在这项工作中,Li(2002)的预取模型通过考虑部分可重构系统的硬件区域约束而得到增强。给定应用程序的任务图,将执行概率较低的任务根据硬件进行拆分和预加载,以便充分利用。因此,重新配置与处理器执行重叠的时间增加了