Modeling Cascade-able Transceiver Blocks With Neural Network For High Speed Link Simulation

Abstract

In this article, we present the methodology of developing cascade-able transceiver models using feed-forward neural network (FNN) for time-domain high speed link (HSL) simulation. Specifically, we focused on FNN assisted nonlinear modeling of transistor level buffers. At each cascading node, the FNN model is able to predict the corresponding voltage waveform and forward that prediction along the HSL link as input for the next available model. Compared to the industrial standard models like SPICE and IBIS, HSL simulation done through FNN models does not involve complicated converging iterations nor does it requires substantial domain knowledge. Furthermore, we demonstrated that by overlaying the high-correlation output responses from the FNN models, eye digram analysis can now be performed 20 times faster than using SPICE solvers.