{"title":"Analysis of Switching Characteristics of Wide SOA and High Reliability 100 V N-LDMOS Transistor with Dual RESURF and Grounded Field Plate Structure","authors":"A. Kuwana, Jun-Ichi Matsuda, Haruo Kobayashi","doi":"10.1109/ASICON52560.2021.9620319","DOIUrl":null,"url":null,"abstract":"We proposed a wide SOA and high reliability 0.35 μm CMOS compatible 100 V dual RESURF LDMOS transistor with low switching loss and low specific on-resistance for automotive applications. This paper describes detailed switching characteristics by changing load resistance RL and gate resistance RG for actual use which were not investigated. TCAD simulations verified that the total energy loss (total switching loss + conduction loss) of the proposed device is sufficiently smaller (about 30 % down at the maximum) than that of the conventional device in most of the actual use range except for the following region: low duty cycle D < 0.1 and high switching frequency f > 1.1 MHz at a low RG of 1.31 Ωmm2 and a high RL of 65.5 Ωmm2 under a device layout area of 1 mm2. Also, a unique switching characteristic of the proposed device, or a convex-shape gate plateau, not observed before, is analyzed.","PeriodicalId":233584,"journal":{"name":"2021 IEEE 14th International Conference on ASIC (ASICON)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 14th International Conference on ASIC (ASICON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON52560.2021.9620319","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
We proposed a wide SOA and high reliability 0.35 μm CMOS compatible 100 V dual RESURF LDMOS transistor with low switching loss and low specific on-resistance for automotive applications. This paper describes detailed switching characteristics by changing load resistance RL and gate resistance RG for actual use which were not investigated. TCAD simulations verified that the total energy loss (total switching loss + conduction loss) of the proposed device is sufficiently smaller (about 30 % down at the maximum) than that of the conventional device in most of the actual use range except for the following region: low duty cycle D < 0.1 and high switching frequency f > 1.1 MHz at a low RG of 1.31 Ωmm2 and a high RL of 65.5 Ωmm2 under a device layout area of 1 mm2. Also, a unique switching characteristic of the proposed device, or a convex-shape gate plateau, not observed before, is analyzed.