A 135 GHz 24 Gb/s Direct-Digital Demodulation 16-QAM Receiver in 28 nm CMOS

Abstract

This paper presents a 135 GHz direct-digital demodulation 16-QAM receiver. A direct-conversion RF front-end is combined with an analog PAM-4 decoder to achieve efficient 16-QAM demodulation without needing a high-speed multi-bit ADC. The receiver, implemented in 28nm CMOS, demonstrates a conversion gain of 25 dB and integrated DSB noise figure better than 10dB. A 24Gb/s 16-QAM signal was detected and directly demodulated on-chip with a power consumption of 175mW.