Jieun Jang, Myeong-Jae Park, Dongyun Lee, Jaeha Kim
{"title":"True event-driven simulation of analog/mixed-signal behaviors in SystemVerilog: A decision-feedback equalizing (DFE) receiver example","authors":"Jieun Jang, Myeong-Jae Park, Dongyun Lee, Jaeha Kim","doi":"10.1109/CICC.2012.6330558","DOIUrl":null,"url":null,"abstract":"This paper presents a true event-driven simulation methodology for analog/mixed signal systems. To avoid generation of new output events without an input event, analog waveforms are expressed as a set of parameter values for an analytical basis function, c·tm-1e-at·u(t). Also, the s-domain analysis enables an algebraic computation of the output event without involving timestep integration. The proposed methodology implemented in SystemVerilog is demonstrated with a decision-feedback equalizer (DFE) example. The experimental results show that both the speed and accuracy of the simulation depend very weakly on the time step resolution, supporting that a true event-driven simulation is realized.","PeriodicalId":130434,"journal":{"name":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2012.6330558","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19
Abstract
This paper presents a true event-driven simulation methodology for analog/mixed signal systems. To avoid generation of new output events without an input event, analog waveforms are expressed as a set of parameter values for an analytical basis function, c·tm-1e-at·u(t). Also, the s-domain analysis enables an algebraic computation of the output event without involving timestep integration. The proposed methodology implemented in SystemVerilog is demonstrated with a decision-feedback equalizer (DFE) example. The experimental results show that both the speed and accuracy of the simulation depend very weakly on the time step resolution, supporting that a true event-driven simulation is realized.