Discrete and continuous models for the performance of multi-stage systems in the presence of faulty components

Abstract

An analysis is made of the performance of multiprocessor systems with a multistage interconnection network in the presence of faulty components. Models for estimating the system performance, as measured by its bandwidth and processing power, are developed for two different modes of operation. In the first mode, the operation of the system is fully synchronized and all processors which need memory access issue their requests simultaneously. In the second, each processor is allowed to issue its request at any time instant. For each of the two modes of operation, two models are presented providing lower and upper estimates for the bandwidth of multistage systems. The expected degradation in the performance of the system (in the presence of faulty components) predicted by these two models is then compared to simulation results.<>