Design of voltage comparator integrated circuit with normally-on MESFETs on 4H-SiC semiconductor

V. Banu, P. Godignon, J. Millán
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引用次数: 3

Abstract

This paper continues our previous works about the integrated circuits development on the 4H-SiC semiconductor, based on finger gate MESFETs. It describes a comparator designed exclusively with normally-on MESFETs and epitaxial resistors. For this novel circuit design we have used the SPICE models previously extracted from devices further used for fabrication of functional complex analog and digital circuitry (thermally compensated analog voltage reference, basic logic gate and various flip-flops).The schematic is presented in detail from the block schematic to the transistor level. The comparator waveforms and the time delays are presented for zero, positive and negative reference levels both at RT and 250°C. The Comparator circuit was successfully simulated using sinusoidal and triangular signals at 100 kHz and 200 kHz. However, the presented waveforms are only for 100 kHz sinusoidal signal.
4H-SiC半导体上常通mesfet电压比较器集成电路的设计
本文延续了前人关于基于指栅mesfet的4H-SiC半导体集成电路的研究工作。它描述了一种专门设计用于正常导通mesfet和外延电阻的比较器。对于这种新颖的电路设计,我们使用了先前从进一步用于制造功能复杂模拟和数字电路(热补偿模拟基准电压,基本逻辑门和各种触发器)的器件中提取的SPICE模型。从模块原理图到晶体管级详细介绍了该原理图。在RT和250°C下给出了零、正、负参考电平的比较器波形和时间延迟。利用100 kHz和200 kHz的正弦和三角形信号成功地模拟了比较器电路。然而,所提出的波形仅适用于100khz的正弦信号。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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