{"title":"Design of voltage comparator integrated circuit with normally-on MESFETs on 4H-SiC semiconductor","authors":"V. Banu, P. Godignon, J. Millán","doi":"10.1109/SMICND.2015.7355198","DOIUrl":null,"url":null,"abstract":"This paper continues our previous works about the integrated circuits development on the 4H-SiC semiconductor, based on finger gate MESFETs. It describes a comparator designed exclusively with normally-on MESFETs and epitaxial resistors. For this novel circuit design we have used the SPICE models previously extracted from devices further used for fabrication of functional complex analog and digital circuitry (thermally compensated analog voltage reference, basic logic gate and various flip-flops).The schematic is presented in detail from the block schematic to the transistor level. The comparator waveforms and the time delays are presented for zero, positive and negative reference levels both at RT and 250°C. The Comparator circuit was successfully simulated using sinusoidal and triangular signals at 100 kHz and 200 kHz. However, the presented waveforms are only for 100 kHz sinusoidal signal.","PeriodicalId":325576,"journal":{"name":"2015 International Semiconductor Conference (CAS)","volume":"147 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 International Semiconductor Conference (CAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SMICND.2015.7355198","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper continues our previous works about the integrated circuits development on the 4H-SiC semiconductor, based on finger gate MESFETs. It describes a comparator designed exclusively with normally-on MESFETs and epitaxial resistors. For this novel circuit design we have used the SPICE models previously extracted from devices further used for fabrication of functional complex analog and digital circuitry (thermally compensated analog voltage reference, basic logic gate and various flip-flops).The schematic is presented in detail from the block schematic to the transistor level. The comparator waveforms and the time delays are presented for zero, positive and negative reference levels both at RT and 250°C. The Comparator circuit was successfully simulated using sinusoidal and triangular signals at 100 kHz and 200 kHz. However, the presented waveforms are only for 100 kHz sinusoidal signal.