Youssef Elasser, J. Baek, K. Radhakrishnan, H. Gan, J. Douglas, H. Krishnamurthy, Xin Li, Shuai Jiang, C. Sullivan, Minjie Chen
{"title":"Vertical Stacked 48V-1V LEGO-PoL CPU Voltage Regulator with 1A/mm2 Current Density","authors":"Youssef Elasser, J. Baek, K. Radhakrishnan, H. Gan, J. Douglas, H. Krishnamurthy, Xin Li, Shuai Jiang, C. Sullivan, Minjie Chen","doi":"10.1109/APEC43599.2022.9773677","DOIUrl":null,"url":null,"abstract":"This paper presents a 48 V–1 V merged-two-stage hybrid-switched-capacitor voltage regulator with a Linear Extendable Group Operated Point-of-Load (LEGO-PoL) architecture for high-current microprocessors, featuring vertical stacked packaging and coupled inductors. The architecture is highly modular and scalable. The switched-capacitor circuits are connected in series on the input side to split the high input voltage into multiple stacked voltage domains. The multiphase buck circuits are connected in parallel to distribute the high output current into multiple parallel current paths. A 780 A vertical stacked CPU voltage regulator with a peak efficiency of 91.1% and a full load efficiency of 79.2% at 1 V output voltage with liquid cooling is built and tested. This is the first demonstration of a 48 V–1 V CPU voltage regulator achieving over 1 A/mm2 current density and 1,000 W/in3 power density. The output voltage is regulated between 0.8 V and 1.5 V through the entire 780 A range.","PeriodicalId":127006,"journal":{"name":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-03-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Applied Power Electronics Conference and Exposition (APEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC43599.2022.9773677","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
This paper presents a 48 V–1 V merged-two-stage hybrid-switched-capacitor voltage regulator with a Linear Extendable Group Operated Point-of-Load (LEGO-PoL) architecture for high-current microprocessors, featuring vertical stacked packaging and coupled inductors. The architecture is highly modular and scalable. The switched-capacitor circuits are connected in series on the input side to split the high input voltage into multiple stacked voltage domains. The multiphase buck circuits are connected in parallel to distribute the high output current into multiple parallel current paths. A 780 A vertical stacked CPU voltage regulator with a peak efficiency of 91.1% and a full load efficiency of 79.2% at 1 V output voltage with liquid cooling is built and tested. This is the first demonstration of a 48 V–1 V CPU voltage regulator achieving over 1 A/mm2 current density and 1,000 W/in3 power density. The output voltage is regulated between 0.8 V and 1.5 V through the entire 780 A range.
本文提出了一种48 V - 1 V合并两级混合开关电容器稳压器,具有线性可扩展组操作负载点(LEGO-PoL)架构,适用于大电流微处理器,具有垂直堆叠封装和耦合电感。该体系结构是高度模块化和可扩展的。在输入侧串联开关电容电路,将高输入电压分拆成多个堆叠电压域。多相降压电路并联连接,将高输出电流分配到多个并联电流通路。构建并测试了一种780a垂直堆叠CPU稳压器,在1v输出电压下,其峰值效率为91.1%,满负荷效率为79.2%。这是48 V - 1 V CPU稳压器实现超过1 a /mm2电流密度和1,000 W/in3功率密度的首次演示。输出电压在0.8 V和1.5 V之间调节,整个780 A范围。