Frequency Performance Improvements for SLCFET Amplifier Through Device Scaling

S. Afroz, T. Vasen, Brian Novak, Ken A. Nagamatsu, P. Shea, S. Wanis, R. Howell, Josephine B. Chang
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引用次数: 4

Abstract

This paper reports frequency performance improvements in Superlattice Castellated Field Effect Transistor (SLCFET) amplifier through device scaling. Device scaling incorporates the variations in castellation ridge width, castellation trench width, castellation length, gate stem length, gate hat length, gate offset, gate dielectric thickness, and passivation thickness. Highest ${f_{T}}$ and Fmax (70GHz/150GHz) values were achieved on devices with shortest castellation length. Shortening castellated access region reduces series resistance resulting in improved frequency performance. Thinner gate dielectric improves transconductance resulting enhancement in frequency performance as well.
通过器件缩放改善SLCFET放大器的频率性能
本文报道了通过器件缩放来改善超晶格场效应晶体管(SLCFET)放大器的频率性能。器件缩放包含了栅极脊宽度、栅极沟槽宽度、栅极长度、栅极杆长度、栅极帽长度、栅极偏移、栅极介电厚度和钝化厚度的变化。最大的${f_{T}}$和Fmax (70GHz/150GHz)值在最短的定位长度的设备上实现。缩短星状接入区域可减少串联电阻,从而改善频率性能。更薄的栅极电介质改善了跨导性,从而增强了频率性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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