M. Khazhinsky, S. Cao, H. Gossner, G. Boselli, M. Etherton
{"title":"Electronic design automation (EDA) solutions for ESD-robust design and verification","authors":"M. Khazhinsky, S. Cao, H. Gossner, G. Boselli, M. Etherton","doi":"10.1109/CICC.2012.6330690","DOIUrl":null,"url":null,"abstract":"The paper describes the essential requirements of the Electrostatic Discharge (ESD) EDA verification flow to be aligned within the IC design community. The proposed flow offers a systematic approach to check ESD robustness across all IC blocks during the product definition, chip architecture, main module and full IC design phases, and during the final IC verification. This flow is substantiated by case studies of key ESD checks at different IC design stages, demonstrating the necessity of replacing manual checks with EDA tool enabled verification.","PeriodicalId":130434,"journal":{"name":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","volume":"101 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2012.6330690","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
The paper describes the essential requirements of the Electrostatic Discharge (ESD) EDA verification flow to be aligned within the IC design community. The proposed flow offers a systematic approach to check ESD robustness across all IC blocks during the product definition, chip architecture, main module and full IC design phases, and during the final IC verification. This flow is substantiated by case studies of key ESD checks at different IC design stages, demonstrating the necessity of replacing manual checks with EDA tool enabled verification.