From gates to FPGA: Learning digital design with Deeds

Abstract

The new technological scenarios demand the introduction of FPGA very early in digital design curricula. The approach that we present in the paper is based on a new tool that extends the features of the Digital Electronics Education and Design Suite (Deeds). The FPGA extension allows students to compile a project generated with Deeds into an FPGA chip, reducing to a minimum the interaction with the FPGA-specific CAD. The tool allows the student to associate all the inputs and outputs of the Deeds project to the devices and resources of an FPGA development board and generates all the VHDL and script files needed by the CAD to compile the project and load it on the board for testing. An extensive field test on a large number of students has proved its pedagogical value.