{"title":"Symmetric CMOS in fully-depleted silicon-on-insulator using P/sup +/-polycrystalline SiGe gate electrodes","authors":"N. Kistler, J. Woo","doi":"10.1109/IEDM.1993.347210","DOIUrl":null,"url":null,"abstract":"In this work, polycrystalline SiGe gate electrodes have been implemented on fully-depleted silicon-on-insulator with light channel doping. Symmetric NMOS and PMOS operation is achieved, with threshold voltages in the range of 0.4-0.6 V. The devices exhibit good short-channel behavior and near-ideal subthreshold slope. CMOS ring oscillators with enhancement-mode NMOS and PMOS have been fabricated, exhibiting propagation delays comparable to previously reported values for fully-depleted SOI.<<ETX>>","PeriodicalId":346650,"journal":{"name":"Proceedings of IEEE International Electron Devices Meeting","volume":"34 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"23","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.1993.347210","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 23
Abstract
In this work, polycrystalline SiGe gate electrodes have been implemented on fully-depleted silicon-on-insulator with light channel doping. Symmetric NMOS and PMOS operation is achieved, with threshold voltages in the range of 0.4-0.6 V. The devices exhibit good short-channel behavior and near-ideal subthreshold slope. CMOS ring oscillators with enhancement-mode NMOS and PMOS have been fabricated, exhibiting propagation delays comparable to previously reported values for fully-depleted SOI.<>