Specification partitioning for system design

Abstract

The authors focus on the goal of partitioning a behavior to satisfy chip-capacity constraints while considering system-performance constraints. A hardware implementation is assumed with a uniform chip technology. A new approach is introduced which partitions entire computations of a behavioral specification, such as processes and procedures, into chip behavioral specifications. The usefulness of the approach was demonstrated. The results of partitioning several examples using the specification partitioning tool being developed are provided.<>