Digital Data Processing Peripheral Design for an Embedded Application based on the Microblaze Soft Core

E. Ostúa, J. Viejo, M. Bellido, A. Millán, J. Juan, A. Muñoz
{"title":"Digital Data Processing Peripheral Design for an Embedded Application based on the Microblaze Soft Core","authors":"E. Ostúa, J. Viejo, M. Bellido, A. Millán, J. Juan, A. Muñoz","doi":"10.1109/SPL.2008.4547756","DOIUrl":null,"url":null,"abstract":"In this paper we present a design of a peripheral for microblaze soft core processor as part of a R+D project carried out in cooperation with three different companies. The objective of the project consisted in the development of an embedded system with a SoC implemented on a FPGA custom-designed board. This work addresses the design of a digital data processing peripheral included as a part of the target SoC application, that process digital signals via the digital inputs on a proposed board. Peripheral functionality is configurable for each digital signal independently and is configured from the software running on the microblaze processor core.","PeriodicalId":372678,"journal":{"name":"2008 4th Southern Conference on Programmable Logic","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 4th Southern Conference on Programmable Logic","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPL.2008.4547756","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10

Abstract

In this paper we present a design of a peripheral for microblaze soft core processor as part of a R+D project carried out in cooperation with three different companies. The objective of the project consisted in the development of an embedded system with a SoC implemented on a FPGA custom-designed board. This work addresses the design of a digital data processing peripheral included as a part of the target SoC application, that process digital signals via the digital inputs on a proposed board. Peripheral functionality is configurable for each digital signal independently and is configured from the software running on the microblaze processor core.
基于Microblaze软核的嵌入式应用程序数字数据处理外设设计
在本文中,我们提出了microblaze软核处理器外设的设计,作为与三家不同公司合作开展的研发项目的一部分。该项目的目标是开发一个嵌入式系统,并在FPGA定制设计的板上实现SoC。这项工作解决了作为目标SoC应用的一部分的数字数据处理外设的设计,该外设通过提议板上的数字输入处理数字信号。外围功能可为每个数字信号独立配置,并从microblaze处理器核心上运行的软件配置。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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