State-aware single event analysis for sequential logic

Abstract

Single Event Effects in sequential logic cells represent the current target for analysis and improvement efforts in both industry and academia. We propose a state-aware analysis methodology that improves the accuracy of Soft Error Rate data for individual sequential instances based on the circuit and application. Furthermore, we exploit the intrinsic imbalance between the SEU susceptibility of different flip-flop states to implement a low-cost SER improvement strategy. Careful, per-state SEE analysis of sequential cells also highlights SET phenomena in flip-flops. We apply de-rating techniques to accurately evaluate their contribution to the overall flip-flop SEE sensitivity.