Revisiting Dynamic Thermal Management Exploiting Inverse Thermal Dependence

Katayoun Neshatpour, H. Homayoun, A. Djahromi, W. Burleson
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引用次数: 1

Abstract

As CMOS technology scales down towards nanometer regime and the supply voltage approaches the threshold voltage, increase in operating temperature results in increased circuit current, which in turn reduces circuit propagation delay. This paper exploits this new phenomenon, known as inverse thermal dependence (ITD) for power, performance, and temperature optimization in processor architecture. ITD changes the maximum achievable operating frequency of the processor at high temperatures. Dynamic thermal management techniques such as activity migration, dynamic voltage frequency scaling, and throttling are revisited in this paper, with a focus on the effect of ITD. Results are obtained using the predictive technology models of 7nm, 10nm 14nm and 20nm technology nodes and with extensive architectural and circuit simulations. The results show that based on the design goals, various design corners should be re-investigated for power, performance and energy-efficiency optimization. Architectural simulations for a multi-core processor and across standard benchmarks show that utilizing ITD-aware schemes for thermal management improves the performance of the processor in terms of speed and energy-delay-product by 8.55% and 4.4%, respectively.
利用逆热依赖重温动态热管理
随着CMOS技术向纳米级方向缩小,电源电压接近阈值电压,工作温度的增加导致电路电流的增加,从而减少了电路的传播延迟。本文利用这种被称为逆热依赖(ITD)的新现象来优化处理器架构中的功率、性能和温度。ITD改变了处理器在高温下可达到的最大工作频率。动态热管理技术,如活度迁移,动态电压频率缩放和节流在本文中被重新审视,重点是过渡段的影响。研究结果采用7nm、10nm、14nm和20nm技术节点的预测技术模型,并进行了大量的架构和电路仿真。结果表明,在设计目标的基础上,应重新考察各个设计角落,进行功率、性能和能效优化。对多核处理器的架构模拟和跨标准基准测试表明,利用可感知过渡段的热管理方案在速度和能量延迟产品方面分别提高了8.55%和4.4%的处理器性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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