Simulator for IDEAL-implementation and environment

Abstract

Presents the simulation strategy for a new hardware description language, IDEAL. IDEAL supports hierarchical and modular descriptions of asynchronous and synchronous digital systems in terms of behaviours and structures. It forms the basis of the IDEAS project for VLSI CAD tools development. The simulator for IDEAL is based on the coroutine model. A design in IDEAL is simulated by appropriately scheduling coroutines corresponding to the design entities. The behavioral and structural description is translated into coroutines by compiling IDEAL data transfer and control constructs into 'C'. The semantics of IDEAL constructs are discussed and the simulator implementation and supporting environment are described.<>