{"title":"A 20 dBm Q-band SiGe Class-E power amplifier with 31% peak PAE","authors":"K. Datta, J. Roderick, H. Hashemi","doi":"10.1109/CICC.2012.6330563","DOIUrl":null,"url":null,"abstract":"A Q-band two-stage Class-E power amplifier is designed and fabricated in a 0.13 μm SiGe HBT BiCMOS process. A mm-wave Class-E architecture considering the effect of various interconnect parasitics is adopted to achieve high power efficiency. Proper input and output networks have been designed to enable efficient switching of the HBT at large voltage swings without causing unwanted impact ionization-induced negative base current and instability. The measured performance of the fabricated chip show 20.2 dBm maximum output power, 31.5% peak power added efficiency, and 10.5 dB power gain across 4 GHz centered around 45 GHz for a supply voltage of 2.5 V. The total chip area including the pads is 0.74 mm × 1.7 mm.","PeriodicalId":130434,"journal":{"name":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2012 Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2012.6330563","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16
Abstract
A Q-band two-stage Class-E power amplifier is designed and fabricated in a 0.13 μm SiGe HBT BiCMOS process. A mm-wave Class-E architecture considering the effect of various interconnect parasitics is adopted to achieve high power efficiency. Proper input and output networks have been designed to enable efficient switching of the HBT at large voltage swings without causing unwanted impact ionization-induced negative base current and instability. The measured performance of the fabricated chip show 20.2 dBm maximum output power, 31.5% peak power added efficiency, and 10.5 dB power gain across 4 GHz centered around 45 GHz for a supply voltage of 2.5 V. The total chip area including the pads is 0.74 mm × 1.7 mm.