A Compact, Power Efficient, Self-Adaptive and PVT Invariant CMOS Relaxation Oscillator

Mounika Kelam, Balaji Yadav Battu, Zia Abbas
{"title":"A Compact, Power Efficient, Self-Adaptive and PVT Invariant CMOS Relaxation Oscillator","authors":"Mounika Kelam, Balaji Yadav Battu, Zia Abbas","doi":"10.1109/ISVLSI49217.2020.00011","DOIUrl":null,"url":null,"abstract":"This brief presents a novel PVT-invariant CMOS relaxation oscillator for Real-Time Clock (RTC) applications. The proposed design is compatible to work in a low supply voltage domain of SoC. The PVT invariance is achieved by a unique circuit implementation of introducing a self-adaptive mechanism that dynamically modifies the time constant of the oscillator core. Moreover, the design is accompanied by a digital calibration unit for further process compensation. Besides, the introduced supply independent bias circuit has greatly improved the supply regulation of the oscillator frequency. In addition, the design utilizes a complementary to absolute temperature (CTAT) current for temperature compensation. Area efficiency is enhanced by replacing bigger passive device i.e, resistor with an adaptive MOS resistor. The obtained results show that the minimum temperature coefficient (TC) of 31.236ppm/°C is achieved over a range of -40°C to 100°C. The resultant phase noise of -140dBc/Hz@1MHz is observed. The design has achieved a good power efficiency of 1.65nW/KHz at room temperature without a calibration unit. The line sensitivity (LS) of 0.1159%/V is noted in the range of 0.7V to 1.2V. Nevertheless, the entire system occupies an active area of 0.0509mm^2 with a power consumption of 90nW@0.7V. Also, the leakage current of the complete system is <54pA. Therefore, the proposed design aims at providing a production-friendly, ease of integration and low-cost solution.","PeriodicalId":423851,"journal":{"name":"2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI49217.2020.00011","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

This brief presents a novel PVT-invariant CMOS relaxation oscillator for Real-Time Clock (RTC) applications. The proposed design is compatible to work in a low supply voltage domain of SoC. The PVT invariance is achieved by a unique circuit implementation of introducing a self-adaptive mechanism that dynamically modifies the time constant of the oscillator core. Moreover, the design is accompanied by a digital calibration unit for further process compensation. Besides, the introduced supply independent bias circuit has greatly improved the supply regulation of the oscillator frequency. In addition, the design utilizes a complementary to absolute temperature (CTAT) current for temperature compensation. Area efficiency is enhanced by replacing bigger passive device i.e, resistor with an adaptive MOS resistor. The obtained results show that the minimum temperature coefficient (TC) of 31.236ppm/°C is achieved over a range of -40°C to 100°C. The resultant phase noise of -140dBc/Hz@1MHz is observed. The design has achieved a good power efficiency of 1.65nW/KHz at room temperature without a calibration unit. The line sensitivity (LS) of 0.1159%/V is noted in the range of 0.7V to 1.2V. Nevertheless, the entire system occupies an active area of 0.0509mm^2 with a power consumption of 90nW@0.7V. Also, the leakage current of the complete system is <54pA. Therefore, the proposed design aims at providing a production-friendly, ease of integration and low-cost solution.
一种紧凑、高效、自适应、PVT不变的CMOS弛豫振荡器
本文介绍了一种用于实时时钟(RTC)应用的新型pvt不变CMOS弛豫振荡器。提出的设计兼容于SoC的低电源电压域。PVT不变性是通过一种独特的电路实现来实现的,该电路引入了一种动态修改振荡器核心时间常数的自适应机制。此外,该设计还配有数字校准单元,用于进一步的过程补偿。此外,引入的电源无关偏置电路大大改善了振荡器频率的电源调节。此外,该设计利用补充绝对温度(CTAT)电流进行温度补偿。用自适应MOS电阻器取代较大的无源器件,从而提高了面积效率。结果表明,在-40℃~ 100℃范围内,温度系数(TC)最小值为31.236ppm/℃。所得相位噪声为-140dBc/Hz@1MHz。该设计在室温下实现了1.65nW/KHz的良好功率效率,无需校准单元。在0.7V至1.2V范围内,线灵敏度(LS)为0.1159%/V。然而,整个系统占用0.0509mm^2的有效面积,功耗为90nW@0.7V。整个系统的漏电流小于54pA。因此,提出的设计旨在提供一个生产友好,易于集成和低成本的解决方案。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信