{"title":"IP quality: a design, not a verification problem","authors":"M. Keating","doi":"10.1109/ISQED.2005.69","DOIUrl":null,"url":null,"abstract":"Last year at ISQED, the author presented a paper describing the challenge IP providers face: customers demand zero-defect IP, yet this is beyond state of the art. This paper presents a possible path to address some of the key limiting issues described last year. Starting with an argument that verification cannot address the IP quality challenge, the paper argues that design methodology changes are the most likely path to increasing IP quality. It describes methods for measuring and reducing the state space of designs, and for representing the state space in a way that leads to more effective reasoning about the design. Finally, it discusses some recent experiments with formal and informal specification.","PeriodicalId":333840,"journal":{"name":"Sixth international symposium on quality electronic design (isqed'05)","volume":"273 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Sixth international symposium on quality electronic design (isqed'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2005.69","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Last year at ISQED, the author presented a paper describing the challenge IP providers face: customers demand zero-defect IP, yet this is beyond state of the art. This paper presents a possible path to address some of the key limiting issues described last year. Starting with an argument that verification cannot address the IP quality challenge, the paper argues that design methodology changes are the most likely path to increasing IP quality. It describes methods for measuring and reducing the state space of designs, and for representing the state space in a way that leads to more effective reasoning about the design. Finally, it discusses some recent experiments with formal and informal specification.