A High Speed Analog Data Multichannel Acquisition System

Abstract

We present an analog data multichannel acquisition system based on two different VLSI CMOS chips, which is used for high speed event acquisition tasks. Although using only one low speed ADC the system offers the capability to process events of twelve analog channels with a maximum sampling frequency of 18 MHz. The cascadable custom chips include analog pipelines with a storage depth of 58 samples, analog buffer memories for events containing up to eight samples and an analog multiplexer for twelve event channels and additional thirteen DC channels. In the paper the chips and system architecture will be discussed and measurements from integrated prototypes will be given.