{"title":"A low power 900 MHz PLL frequency synthesizer for ISM applications using 0.25 /spl mu/m BiCMOS","authors":"K. Huehne, D. Lovelace, P. Ovalle","doi":"10.1109/ICCDCS.2000.869806","DOIUrl":null,"url":null,"abstract":"MOS Current Mode Logic (CML) is featured on a 0.25 /spl mu/m BiCMOS technology to implement a low noise, low power PLL operating to 1.2 GHz for portable wireless applications. It operates over 1.8 to 2.8 V and consumes 9.3 mA including the VCO. As part of a highly integrated two-chip transceiver system, full differential operation significantly reduces phase noise.","PeriodicalId":301003,"journal":{"name":"Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474)","volume":"88 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2000 Third IEEE International Caracas Conference on Devices, Circuits and Systems (Cat. No.00TH8474)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCDCS.2000.869806","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
MOS Current Mode Logic (CML) is featured on a 0.25 /spl mu/m BiCMOS technology to implement a low noise, low power PLL operating to 1.2 GHz for portable wireless applications. It operates over 1.8 to 2.8 V and consumes 9.3 mA including the VCO. As part of a highly integrated two-chip transceiver system, full differential operation significantly reduces phase noise.