{"title":"Bi-directional read method to reduce SOT-specific read disturbance for highly reliable SOT-MRAM","authors":"Akihiro Yamada, Yuwa Kishi, T. Kawahara","doi":"10.1109/IMW52921.2022.9779297","DOIUrl":null,"url":null,"abstract":"We propose a bi-directional read method for improving read-disturbing resistance to maintain high read reliability of spin-orbit-torque magnetoresistive random-access memory. Since this method can withstand magnetization switching with a current 10 times or more that of the conventional method, it enables low power consumption operation while maintaining high read reliability. We evaluated our method in terms of improving read disturbance resistance by focusing on, the dependence of material properties, size, and wiring resistance in the memory cell array. We also evaluated the read reliability as a chip to confirm the method's effectiveness.","PeriodicalId":132074,"journal":{"name":"2022 IEEE International Memory Workshop (IMW)","volume":"4 2","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE International Memory Workshop (IMW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMW52921.2022.9779297","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
We propose a bi-directional read method for improving read-disturbing resistance to maintain high read reliability of spin-orbit-torque magnetoresistive random-access memory. Since this method can withstand magnetization switching with a current 10 times or more that of the conventional method, it enables low power consumption operation while maintaining high read reliability. We evaluated our method in terms of improving read disturbance resistance by focusing on, the dependence of material properties, size, and wiring resistance in the memory cell array. We also evaluated the read reliability as a chip to confirm the method's effectiveness.