Capron Jean-Marc, Mathieu Troch, D. D. Schuyter, A. Verhoeven, J. Knockaert, P. Saey
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引用次数: 0
Abstract
This paper presents the design, the validation steps and the measurement results of a fault generator device able to disturb the operation of a PROFIBUS DP network, under user-defined conditions. It allows to test the robustness of an industrial network, to test and compare diagnostic tools, and to investigate off-line more complex faults encountered in industry. The core of the design is an FPGA, which allows for a very low latency time. It generates trigger signals and imposes faults on the RS485 level up to the maximum bit rate of 12 Mbps. The design choices for fault duration, number of successive faults and skipped triggers, waiting time, etc. allow for the emulation of a wide range of network faults.