Flip-chip bonded silicon carbide MOSFETs as a low parasitic alternative to wire-bonding

S. Seal, M. Glover, Andrea K. Wallace, H. Mantooth
{"title":"Flip-chip bonded silicon carbide MOSFETs as a low parasitic alternative to wire-bonding","authors":"S. Seal, M. Glover, Andrea K. Wallace, H. Mantooth","doi":"10.1109/WIPDA.2016.7799936","DOIUrl":null,"url":null,"abstract":"This paper presents flip-chip bonding as an alternative to wire-bonding for commercially available silicon carbide (SiC) MOSFETs. A process was developed for the wire-bondless attachment of a SiC power MOSFET onto a substrate. The gate and source bond pads of commercially available MOSFETs are typically made of aluminum to aid the wire bonding process. The process for obtaining a finish suitable for soldering or sintering on these pads is described in this paper. An additional concern during the flip-chip bonding of a MOSFET is the possible shorting of the source and gate pads. The gate and source terminals of the power MOSFET are typically in very close proximity with each other on the die, making the flip-chip process susceptible to the formation of conductive bridges when soldering or sintering. A procedure for addressing this concern is presented. The performance benefits of the flip-chip scheme are analyzed and compared with the traditional wire bonding process through die shear and pull tests.","PeriodicalId":431347,"journal":{"name":"2016 IEEE 4th Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 4th Workshop on Wide Bandgap Power Devices and Applications (WiPDA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WIPDA.2016.7799936","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16

Abstract

This paper presents flip-chip bonding as an alternative to wire-bonding for commercially available silicon carbide (SiC) MOSFETs. A process was developed for the wire-bondless attachment of a SiC power MOSFET onto a substrate. The gate and source bond pads of commercially available MOSFETs are typically made of aluminum to aid the wire bonding process. The process for obtaining a finish suitable for soldering or sintering on these pads is described in this paper. An additional concern during the flip-chip bonding of a MOSFET is the possible shorting of the source and gate pads. The gate and source terminals of the power MOSFET are typically in very close proximity with each other on the die, making the flip-chip process susceptible to the formation of conductive bridges when soldering or sintering. A procedure for addressing this concern is presented. The performance benefits of the flip-chip scheme are analyzed and compared with the traditional wire bonding process through die shear and pull tests.
倒装晶片键合碳化硅mosfet作为低寄生替代线键合
本文介绍了倒装芯片键合作为线键合的替代方案,用于市售的碳化硅(SiC) mosfet。提出了一种将SiC功率MOSFET无线连接到衬底上的方法。市售mosfet的栅极和源键合垫通常由铝制成,以帮助线键合过程。本文描述了在这些焊盘上获得适合焊接或烧结的光洁度的过程。在MOSFET的倒装键合过程中,另一个值得关注的问题是源极和栅极衬垫可能发生短路。功率MOSFET的栅极和源端通常在芯片上彼此非常接近,这使得倒装工艺在焊接或烧结时容易形成导电桥。提出了解决这一问题的程序。通过模具剪切和拉拔试验,分析并比较了倒装芯片方案与传统焊线工艺的性能优势。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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