Package market segments and design challenges

Abstract

In the development of the 1997 edition of the National Technology Roadmap for Semiconductors (NTRS), the Roadmap Coordinating Group (RCG) recognized the needs of the semiconductor industry for larger chips having higher speed and power, and greater transistor density. The overall consensus is that the industry had over-run the present Roadmap Technology projections by about 1-2 years. From these projections of the overall technology characteristics are derived for the needs for packaging and assembly technologies that support and enable this dynamic growth. In the present paper, we shall provide detailed discussions of the potential solutions for the high density substrates and the issues that the wafer development brings to the creation of packaging solutions for future electronic systems. The most apparent changes to the packaging technology requirements changes have been driven by the increase in chip speed and functionality, the materials set for wafer level interconnect, and the power requirements. These quantities have driven the derived needs for greater and greater interconnect to and from the chip, different materials for packaging solutions, more effective thermal management, and software systems to design and model it all. The package is also shrinking to meet the miniaturization requirements of many of the hand-held products. The most challenging issue is the cost of the packaging solutions, which has generally exceeded the targets desired by users. Additional invention and/or development will be needed before the needed packaging can be deployed as affordable solutions.