Hands-on Introduction to Bluespec System Verilog (BSV)

Abstract

BSV is a modern, fully synthesizable design language in which all behavior is expressed with Guarded Atomic Actions (rewrite rules). Rules can be systematically composed from fragments across module boundaries using atomic transactional interfaces. BSV has powerful abstraction mechanisms such as expressive and polymorphic types with overloading and strong static type-checking, full orthogonality (all types are first-class), and Turing-complete static elaboration. Thus, BSV is scalable to large, industrial-strength SoCs even while designs remain highly parameterized and succinct. In this tutorial, you will get a solid technical introduction to BSV and learn how it improves many aspects of modern SoC development: modeling, early SW development, architecture exploration, design, verification, and long-term evolution and maintenance. The lectures will be organized around a few serious examples and we will examine and analyze excerpts of their actual source code. The tutorial is also hands-on: Participants who bring their laptops will receive a non-commercial but full-featured short-term installation of the latest release of BSV (native under Linux, and via a VMWare image for other OSs). During the tutorial you will work with lab exercises tied to the lecture content. After the tutorial you will be able to continue your own exploration with plenty of other examples and lab exercises.