Scatter Scrubbing: A Method to Reduce SEU Repair Time in FPGA Configuration Memory

Abstract

SRAM-based FPGAs are widely used in many critical systems in which dependability is an essential factor. However, SRAM-based FPGAs are sensitive to Single Event Upsets (SEUs), especially when they are used in space. Scrubbing is an effective technique to protect FPGA Configuration Memory (CM) against SEUs. One major hurdle in read-back scrubbing techniques is that they suffer from long Mean Time To Repair (MTTR). In this paper, we propose scatter scrubbing, a new method that reduces MTTR by exploiting the locality of SEUs sensitive bits in CM. It is based on 1) splitting FPGA CM into several partitions based on how critical the CM bits are for proper operation of the FPGA circuit, and 2) deriving a smart schedule for scrubbing the partitions. Finding an optimal partition and scheduling has non-polynomial complexity; therefore we rely on clever heuristics, especially for the first step. However, for small designs, we developed an accelerated brute-force method giving the optimal solution, which we can use as a reference. The experimental results show, for real FPGA designs, up to 64% reduction in MTTR compared to state-of-the-art techniques.