An approach to synthesis of mixed synchronous/asynchronous digital devices

Abstract

The design of mixed synchronous/asynchronous digital systems presents several challenges to the designer. Not the least of these is demand of functional partitioning of initial descriptions at different levels of design process. In this work we propose partitioning technique of state-based descriptions at register-transfer level targeting the network of synchronous units which are interacting asynchronically. This paper is based on the observation that during the operation of a digital system, there are conditions such that the states of data processing sub-units do not change for some period of time.