Ang Hu, Dongsheng Liu, Ke-feng Zhang, Lan-qi Liu, X. Zou
{"title":"A 0.045- to 2.5- GHz Frequency Synthesizer with TDC-based AFC and Phase Switching Multi-Modulus Divider","authors":"Ang Hu, Dongsheng Liu, Ke-feng Zhang, Lan-qi Liu, X. Zou","doi":"10.1109/MWSCAS.2019.8885373","DOIUrl":null,"url":null,"abstract":"A 0.045- to 2.5- GHz wideband frequency synthesizer (FS) employing time-to-digital converter (TDC) based automatic frequency calibration (AFC) method and phase switching multi-modulus divider (MMD) for quantization noise suppression is presented in this paper. The counter-based AFC method takes several reference cycles to calculate the instantaneous voltage controlled oscillator (VCO) frequency, while the proposed TDC-based technique needs only 2 cycles. In order to suppress the quantization noise caused by the sigma-delta modulator (SDM) in the MMD, the loop division step is reduced from 2 to 0.5 by adopting the phase switching (PS) technique. The FS is designed and simulated using TSMC 180nm RF CMOS process. The simulation results of the AFC time are less than 1.4 μs when employing a 48 MHz reference signal and the quantization noise is suppressed by 12 dB compared to the conventional MMD structure.","PeriodicalId":287815,"journal":{"name":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2019.8885373","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
A 0.045- to 2.5- GHz wideband frequency synthesizer (FS) employing time-to-digital converter (TDC) based automatic frequency calibration (AFC) method and phase switching multi-modulus divider (MMD) for quantization noise suppression is presented in this paper. The counter-based AFC method takes several reference cycles to calculate the instantaneous voltage controlled oscillator (VCO) frequency, while the proposed TDC-based technique needs only 2 cycles. In order to suppress the quantization noise caused by the sigma-delta modulator (SDM) in the MMD, the loop division step is reduced from 2 to 0.5 by adopting the phase switching (PS) technique. The FS is designed and simulated using TSMC 180nm RF CMOS process. The simulation results of the AFC time are less than 1.4 μs when employing a 48 MHz reference signal and the quantization noise is suppressed by 12 dB compared to the conventional MMD structure.