A study on relating redundancy removal in classical circuits to reversible mapping

Abstract

We present a way of synthesis of reversible circuits using redundant faults information obtained with the aid of its classical counterpart. We use Toffoli-based modules of classical standard gates and technology mapping to relate the effect of redundant stuck-at-value fault in classical irreversible gate level circuits and their reversible implementation. The simplified form of such Toffoli modules is proposed considering any fixed values of input signals (corresponding to stuck-at value effects). We also present redundant gates removal in reversible mapping.