Consistent Predictive Simulation of SRAM-Cell Performance Degradation Including Both MOSFET Fabrication Variation and Aging

Abstract

We have developed a methodology to simulate circuit aging including the device fabrication variation with less simulation effort. As an example a 6T SRAM cell has been investigated. It is demonstrated that the variability range of the circuit performance is further enhanced due to the long-term device aging. Among the device parameters, the impurity concentration variation plays a particularly important role for the circuit performance variation. However, most sensitive for the aging degradation is the channel-length variation, because it increases the aging effect drastically. Further, the individual aging of each MOSFET is strongly dependent on the actual stress during circuit operation.