Getting high-performance silicon from system-level design

W. R. Davis
{"title":"Getting high-performance silicon from system-level design","authors":"W. R. Davis","doi":"10.1109/ISVLSI.2003.1183482","DOIUrl":null,"url":null,"abstract":"System-level design techniques promise a way to lessen the productivity gap between fabrication and design. Unfortunately, these techniques have been slow to catch on, in part because they do little to help designers optimize hardware. This paper presents a brief summary of three system-level design techniques. Platform-based design, SystemC, and Chip-in-a-day, in order to propose that more system-level abstraction of physical performance is needed to make these techniques more useful. An analysis of design-productivity for three chips designed with the Chip-in-a-Day flow is also presented.","PeriodicalId":299309,"journal":{"name":"IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings.","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2003.1183482","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9

Abstract

System-level design techniques promise a way to lessen the productivity gap between fabrication and design. Unfortunately, these techniques have been slow to catch on, in part because they do little to help designers optimize hardware. This paper presents a brief summary of three system-level design techniques. Platform-based design, SystemC, and Chip-in-a-day, in order to propose that more system-level abstraction of physical performance is needed to make these techniques more useful. An analysis of design-productivity for three chips designed with the Chip-in-a-Day flow is also presented.
从系统级设计中获得高性能芯片
系统级设计技术有望减少制造和设计之间的生产力差距。不幸的是,这些技术的流行速度很慢,部分原因是它们在帮助设计人员优化硬件方面做得很少。本文简要介绍了三种系统级设计技术。基于平台的设计,SystemC和Chip-in-a-day,以便提出需要更多的系统级物理性能抽象,以使这些技术更有用。本文还分析了采用“每日芯片”流程设计的三种芯片的设计生产率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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