Andrzej A. Wojciechowski, Krzysztof Marcinek, W. Pleskacz
{"title":"Configurable MBIST Processor for Embedded Memories Testing","authors":"Andrzej A. Wojciechowski, Krzysztof Marcinek, W. Pleskacz","doi":"10.23919/MIXDES.2019.8787161","DOIUrl":null,"url":null,"abstract":"Nowadays, demand for computing power grows faster than ever. This results in more integrated circuits are being dedicated to memories. The efficient testing of such SRAM memories is a difficult task. An integrated Memory Built-In Self-Test (MBIST) module provides an effective testing capability with reasonable area cost. This paper describes the design of a configurable MBIST processor for embedded single-port and dual-port memories testing. Embedded memory fault models were summarized. The developed test environment with memory model and fault injection capability was used to verify the effectiveness of the implemented algorithms.","PeriodicalId":309822,"journal":{"name":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 MIXDES - 26th International Conference \"Mixed Design of Integrated Circuits and Systems\"","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/MIXDES.2019.8787161","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
Nowadays, demand for computing power grows faster than ever. This results in more integrated circuits are being dedicated to memories. The efficient testing of such SRAM memories is a difficult task. An integrated Memory Built-In Self-Test (MBIST) module provides an effective testing capability with reasonable area cost. This paper describes the design of a configurable MBIST processor for embedded single-port and dual-port memories testing. Embedded memory fault models were summarized. The developed test environment with memory model and fault injection capability was used to verify the effectiveness of the implemented algorithms.