A Compact 14 GS/s 8-Bit Switched-Capacitor DAC in 16 nm FinFET CMOS

Abstract

This paper presents a compact DAC for digital-intensive transmitter architectures. To minimize area and to leverage the strengths of FinFET CMOS, the implementation departs from the traditional current steering approach and consists mainly of inverters and sub-femtofarad switched capacitors. The 14 GS/s 8-bit design occupies only 0.011 mm2 and supports up to 0.32 Vpp signal swing across its differential 100 Ω load. It achieves IM3 < −45.3 dBc across the first Nyquist zone while consuming 50 mW from a single 0.8 V supply.