Design of a 400-MHz 1-V 1.4-mW CMOS RF receiver for MICS applications

Abstract

This paper describes low-voltage and low-power design of a CMOS RF receiver front-end circuit for MICS applications. The direct-conversion RF receiver is composed of a single-ended cascode LNA, single-to-differential converting gm-stage, quadrature passive mixer with 25% LO duty cycle, and transimpedance amplifier. Extensive circuit simulations show that the receiver has the maximum conversion gain of 45 dB, the input-referred P1dB of −34.8 dBm, and the noise figure of 2.6 dB, while dissipating 1.4 mW from a 1-V supply.