Determining System Level Margin through SIPI Co-simulation and Jitter Transfer Function

Abstract

This paper investigates Signal Integrity - Power Integrity relationship using a dual reference package design and understanding high-speed interconnect circuit's behavior through Jitter Transfer Function. A dual referencing design and modeling approach is introduced to enable maximum noise coupling to differential signal traces. Simulation platform that allows a quick jitter assessment with power noise injection is then built to evaluate the risk of having dual referencing design. Using Peripheral Component Interconnect Express Gen5 interconnects as a case study, the findings shown that mid-frequency power noise matters most to differential interconnects, which turned out to be correlated to its Jitter Transfer Function.